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Prof. Dr.-Ing. Wolfgang Nebel

Wissenschaftliche Mitarbeiter

M.Sc. Henning Schlender

M.Sc. Ralf Stemmer

M.Sc. Friederike Bruns

Sekretariat

Yvonne Ackermann

Escherweg 2
26121 Oldenburg 

Tel.: +49 441 9722-283

Fax: +49 441 9722-282

Raum: O85/OFFIS

Sprechstunde jederzeit nach Absprache
(Kurze formlose Mail mit Wunschtermin & Thema)

Telefon: +49 441 9722-229

 


RESEARCH

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Research Interest

Execution time characterization and modeling for analysis of Synchronous Data Flow (SDF) applications on MPSoCs with consideration of shared resources and actor delay distributions.

Recent Publications

Additional content to my publications can be found at my university's GitLab account:
gitlab.uni-oldenburg.de/stemmer

Main Author

  • In Review (ERTS'20) - "Towards Probabilistic Timing Analysis for SDFGs on Tile Based Heterogeneous MPSoCs"
    Ralf Stemmer, Hai-Dang Vu, Maher Fakih, Kim Grüttner, Sébastien Le Nours, Wolfgang Nebel and Sébastien Pillement
  • SAMOS'19 - "Experimental evaluation of probabilistic execution-time modeling and analysis methods for SDF applications on MPSoCs"
    Ralf Stemmer, Hai-Dang Vu, Maher Fakih, Kim Grüttner, Sébastien Le Nours, Wolfgang Nebel and Sébastien Pillement
  • DATE'19 - "Probabilistic State-Based RT-Analysis of SDFGs on MPSoCs with Shared Memory Communication"
    Ralf Stemmer, Henning Schlender, Maher Fakih, Kim Grüttner and Wolfgang Nebel
  • Technical Report 2019 - "Feasibility Study of Probabilistic Timing Analysis Methods for SDF Applications on Multi-Core Processors" (Open Access)
    Ralf Stemmer, Hai-Dang Vu, Maher Fakih, Kim Grüttner, Sébastien Le Nours and Sébastien Pillement
  • RAPIDO'17 - "Towards State-Based RT Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication"
    Ralf Stemmer, Maher Fakih, Kim Grüttner and Wolfgang Nebel
  • MBMV'17 - "Towards Timing and Power Analysis of FSM-SADFGs on MPSoCs with Shared Memory Communication"
    Ralf Stemmer and Maher Fakih

Co-Author

  • COINS'18 - "Experimental Evaluation of Scenario Aware Synchronous Data Flow based Power Management"
    Oliver Klemp, Maher Fakih, Kim Grüttner, Ralf Stemmer and Wolfgang Nebel
  • HIP3ES'17 - "Power and Execution Time Measurement Methodology for SDF Applications on FPGA-based MPSoCs" (Open Access)
    Christof Schlaak, Maher Fakih and Ralf Stemmer

TEACHING

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Lectures and Seminars

Bachelor Courses

Master Courses

Supervised Students project groups

Supervised Theses

Main Supervisor

  • In Progress (2020) - "A TDMA proxy for the AXI Interconnect" (Bachelor Thesis)
  • 2019 - "Erweiterung eins MPSoC Systemmodells um Softwareseitige Datenabhängigkeiten und Implementierung in SystemC" (Master Thesis)
  • 2017 - "Benchmark zur Ausführungszeit und Verlustleistungsmessung von Datenflussanwendungen auf einem eingebettetem Multi-Prozessor System" (Bachelor Thesis)

Co-Supervisor

  • 2019 - "Design Space Exploration auf Basis von Ausführungs- und Verlustleistungsmessung" (Bachelor Thesis)
  • 2019 - "Ausführungszeit und Power-Analyse von Scenario-aware Synchronous Dataflow Graphs auf FPGA  basierten MPSoCs" (Master Thesis)
  • 2018 - "Entwurf und Implementierung eines Client/Server Frameworks zur Analyse von Synchronous Dataflow Graphs (SDFG)" (Master Thesis)
  • 2018 - "FPGA-Beschleunigung eines Machine-Learning Klassifikators zur Objekterkennung auf einem Multi-Rotor-Avionik-System" (Bachelor Thesis)
  • 2016 - "Messbasierte Ausführungszeit- und Verlustleistungs-Analysen von Synchronen Datenflussgraphen auf FPGA-basierten MPSoCs" (Master Thesis)

 

Webmtzgaster (henning.schlenderqc@us4tol.de1naxj) (Stand: 07.11.2019)